当前位置：
首页 资源下载
搜索资源 - floating point verilog
搜索资源列表
-
0下载：
利用FPGA实现浮点运算的verilog代码
希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
-
-
1下载：
verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog
-
-
0下载：
这个主要是实现RGB和YUV两种色彩空间的转换，其中用到的主要思想是，verilog语言中的浮点乘法怎么运算，流水线的思想。-This is achieved mainly two kinds of RGB and YUV color space conversion, which uses the main idea is, verilog language how floating point multiplication operations, lines of thought.
-
-
0下载：
CAN总线的FPGA实现，用Verilog编写，代码完整，而且有很完善的测试代码，用ISE直接打开，学习FPGA进阶的好项目-CAN Bus FPGA, written with Verilog, code integrity, but also very good test code, using ISE directly open, a good project to learn advanced FPGA
-
-
1下载：
利用Verilog实现32位浮点数的乘法,并且已通过验证.-Using Verilog to achieve 32-bit floating point multiplication, and has been verified.
-
-
0下载：
超前进位加法器是通常数字设计所必备的，本程序为32位超前进位加法器-CLA is usually necessary for digital design, the procedure for 32-bit CLA
-
-
0下载：
用verilog实现三十二位浮点数算法，通过状态机的方法实现。-32 floating-point implementation using verilog algorithm, the method adopted by the state machine implementation.
-
-
0下载：
it is verilog code for floating point adder
-
-
0下载：
verilog code floating point division
-
-
1下载：
Verilog HDL code for implementation of double floating point architecture. Program takes care of diffent exceptions like overflow, underflow, NaN etc
-
-
0下载：
IEEE 754 floating point
-
-
0下载：
design floating point unit
-
-
1下载：
能够实现单精度浮点加法运算。输入引脚有：第一运算数，第二运算数，复位信号，时钟信号。输出信号有：运算结果，运算完成标志。(To achieve a single precision floating-point addition operations)
-
-
2下载：
最全的，最简单，32位浮点数转整数，32位整数转浮点数，直接可以移植，已经测试过好用。(The most complete, the simplest, 32 bit floating-point integer, 32 integer floating point number, can be directly transplanted, has been tested, easy to use.)
-
-
0下载：
使用altera提供的ip核，实现了浮点数运算的2阶iir滤波器，结果与matlab运算结果相同。(Using the IP core provided by Altera, the 2 order IIR filter of floating point operation is implemented, and the result is the same as that of MATLAB operation.)
-
-
1下载：
float_multi_module实现了单精度浮点乘法运算(Float_multi_module implements single precision floating point multiplication.)
-
-
1下载：
《基于FPGA的单精度浮点数乘法器设计》详细介绍了按照IEEE754标准在FPGA上实现单精度浮点加减乘除的方法(The design of single precision floating point multiplier based on FPGA introduces in detail the way of realizing single precision floating point addition, subtraction and multiplication and div
-
-
0下载：
32 bit floating point adder with testbench
-
-
0下载：
floating point divider for 32 bit with test bench
-
-
4下载：
verilog 语言写的FPGA内部实现硬件浮点乘法器的源码，两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)
-
